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December 15, 2008

Intel Corp. said today that it has completed the development phase of its next-generation chip manufacturing process that will further shrink CPU and chip circuitry to only 32 nanometers. Intel is getting ready for production preparation of this future generation using even more energy-efficient, denser and higher performing transistors slated for production in October of next year.

Intel's new plans revolve around introducing an entirely new CPU architecture alternating with a cutting edge manufacturing process about every year, an effort unmatched in the semiconductor industry, the company says.

Making 32 nm chips in 2009 would mark the fourth consecutive year Intel has met this specific goal.

The world's largest chip maker will provide a multitude of technical details around its new 32nm process technology along with several other topics during presentations at the International Electron Devices meeting (IEDM) beginning today and running through Wednesday in San Francisco.

Finishing the development phase for the company's 32nm process technology and production readiness in this timeframe means that Intel remains on pace with its very ambitious product and manufacturing cadence referred to as the company's "tick-tock" strategy.

Mark Bohr, Intel Senior Fellow says "our manufacturing prowess and resulting successful products have helped us broaden our lead in computing performance and battery life for Intel-based laptops, servers and desktops. As we've shown in 2008, the manufacturing strategy and execution have also given us the ability to create entirely new product lines for MIDs, CE equipment, embedded computers and netbooks. We are now looking at 2009 to repeat the same performance".

The Intel 32 nm presentation describe a logic technology that incorporates second-generation high-K + metal gate technology, 193 nm immersion lithography for critical patterning layers and enhanced transistor strain techniques.

These features enhance the performance and energy efficiency of Intel processors.

To this day, Intel's manufacturing process has a very high transistor performance and the highest transistor density of any reported 32 nm technology in the semiconductor industry.

Other Intel IEDM papers will also describe a low power system on various chip versions of Intel's 45nm process, transistors based on compound semiconductors, substrate engineering to improve performance of 45nm transistors, integrating chemical mechanical polish for the 45 nm node and beyond.

Intel also said it will be integrating an array of silicon photonics modulators early next year. The chip maker will also participate in a short course on 22nm CMOS Technology to be announced sometime in February.

Source: Intel.

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